The four models
Each model is one interface, mapped to its 1980s hardware ancestor. Model 1 is the brain. Model 2 is the user. Model 3 is the nerves. Model 4 is the body. Select a model to read its nine chapters.
The Cognitive Interface
The Biological Blueprint: AI as a synthetic organism
A creative reframe of the whole framework: instead of a machine, view the AI system as an organism, and data flow becomes metabolism. Seven organs, each mapped to a system component.
| Organ | Component | Anatomy |
|---|---|---|
| The Cortex | The LLM | Reasoning, pattern matching, language generation. Frozen neurons (weights) are long-term memory acquired in “childhood” (pre-training) and never change during conversation; synaptic fire (inference) is the electrical storm when a question is asked. |
| The Hippocampus | The Context Window | Short-term working memory. Holds the “current moment.” Finite: hold too much and the oldest memories are pushed out and die. Attention heads are mental fingers pointing at specific memories to synthesize an answer. |
| The Extended Nervous System | RAG / Vector DB | Long-term external memory, an external drive attached to the brain. The indexing reflex: a question fires a signal down the nerve, grabs a relevant memory from the “Library of Life,” and pulls it into the hippocampus. |
| The Sensory Organs | Multimodal Encoders | The eyes (vision encoder) convert light into thoughts (embeddings); the cortex never sees the image, it only “feels” its mathematical description. The ears convert sound waves into phonemes and tokens. |
| The Limbs | Tools & Agents | The hands (API calls) touch other software: Stripe, email, Slack. Proprioception is the feedback loop that knows whether the hand actually grabbed the object: did the call succeed, or error? |
| The Pre-Frontal Cortex | The System Prompt | Impulse control, personality, rules: the conscience of the organism. Suppresses intrusive thoughts (safety filters) and directs focus (task definition). |
| The Immune System | Guardrails | Protects the organism from viral ideas. Input filters block prompt injections before they reach the cortex; output filters catch toxic output before it leaves the mouth. |
The Cognitive Processor: LLM-8088
In the 1980s, engineers used pinout diagrams to understand how to talk to a chip. Figure 1.1 of the framework is a metaphorical pinout for a Large Language Model: how to “wire” it into an application.
The Cognitive Cycle (Figure 1.2): timing, not clock
An old CPU processes on a clock cycle; an AI processes on a reasoning cycle. Select a phase:
Load the instruction register
The agent loop that clocks the cycle (Model 1 manual): TICK (Perceive) polls inputs, user chat, API webhooks, timer events. TOCK (Reason) decides the next action: speak, tool call, wait. ACTION (Execute) runs it. And the missing detail in most builds: a watchdog timer. If the model loops (“I am thinking…”), an external timer kills the generation after X seconds to prevent thermal runaway: burning API credits.
The Memory Map (Figure 1.3): the context window as address space
In the 80s, a memory map ran 0x0000 to 0xFFFF, and writing to the wrong address crashed the machine. In AI, the address space is the context window, and it crashes the same way. Drag the conversation length and watch the map.
| Address | 80s Component | Modern Equivalent | Role |
|---|---|---|---|
| 0x0000–0x0FFF | ROM | System Prompt | The unchangeable personality and rules. |
| 0x1000–0x3FFF | R/W RAM (Heap) | Few-Shot Examples | Teaching the model by example: “Input: A, Output: B.” |
| 0x4000–0x7FFF | R/W RAM (Stack) | RAG / Retrieved Context | Information pulled from the “hard drive” (vector DB) relevant to right now. |
| 0x8000–0xEFFF | Video RAM | Chat History | The visible conversation log. It grows until it overflows. |
| 0xF000–0xFFFF | Input Buffer | User Query | The newest thing the user just said. |
The Cognitive Systems Manifesto: the standard library
We have built powerful engines (LLMs) but put them in wooden chassis (Python scripts). Software assumes determinism (Input A = Output A); AI is probabilistic (Input A ≈ Output A… usually). The solution: adopt hardware engineering principles, disciplines designed to manage noise, heat, and entropy.
The Semantic Fuse
A lightweight classifier sits after the main LLM. If the toxicity score or confidence score drops below threshold, the fuse blows and the output is physically blocked. A deterministic if/else driven by a specialized classifier, not the main LLM. Datasheet: SF-2024 / SF-500. Runs in the lab below.
The Context Buffer (CB-128)
A FIFO chip for memory. A summarization loop compresses the oldest parts of the conversation into “long-term semantic hashing” before they fall out of the window. Benefit: prevents catastrophic forgetting during long tasks.
The Hallucination Debouncer
A hardware debouncer ignores glitchy on/off signals from a mechanical switch. The cognitive version is consensus verification: run the query 3 times in parallel at high temperature. 3/3 agree: pass. 1/3 agree: noise detected, block, retry. Runs in the lab below.
The Impedance Matcher (IM-8B) — the router
Match the load to the source for maximum power transfer. A router agent sends each query to the smallest capable model: “What is 2+2?” to the calculator (zero cost), “Write a poem” to the large model (high cost), “Summarize this email” to the small model (low cost). Runs in the lab below.
The “Standard Bus”: the Thought Packet
Just as the S-100 bus let cards talk to each other, every communication between agents must carry a standard header:
Standard glossary (Rev 1.0, selected)
| Term | Hardware analog | Definition |
|---|---|---|
| Cognitive Unit (CU) | CPU | The central Large Language Model. |
| Context Window | RAM | The volatile working memory of the CU. |
| Vector Store | Hard disk | Persistent semantic storage. |
| Token | Byte | The fundamental unit of data transfer (approx. 0.75 words). |
| Inference Cycle | Clock cycle | The discrete step to generate one thought or action. |
| Hallucination | Signal noise / bit flip | Output data that does not match ground truth or input logic. |
| Grounding | Tying to GND | Forcing the CU to reference an external truth source before outputting. |
| Temperature | Control voltage | Randomness of the output signal: 0.0 deterministic, 1.0 stochastic. |
| Prompt Injection | Buffer overflow | An adversarial high-voltage signal designed to override the system prompt. |
| Tool Call | DMA | A CU request to access an external peripheral (API). |
| Stop Sequence | IRQ | A signal code that halts generation. |
Component labs: the standard library, running
Four of the framework's components, live in this page. The fuse uses its own SF-2024 truth table. The debouncer applies the manifesto's consensus rule. The router applies the IM-8B routing logic. The ReAct runner replays the schematics library's worked example.
Lab 1 · Semantic Fuse SF-2024
Datasheet: active safety logic gate. Pin 1 IN (raw text stream), Pin 2 REF (forbidden-concept embeddings), Pin 3 V_THRESH (sensitivity 0.0–1.0), Pin 4 OUT (safe stream), Pin 5 TRIP (alert). Absolute maximums: <20ms added latency, 8k-token buffer, <0.5% false-positive rate at nominal voltage. Placed in series immediately after the LLM output pin. Once tripped, it needs a SYSTEM_RESET (new thread) or a manual reset pulse. The classifier here is a small stand-in; the datasheet specifies a specialized classifier model, not the main LLM.
Lab 2 · Hallucination Debouncer: consensus verification
The rule, verbatim in effect: run the query 3 times in parallel at high temperature. 3/3 agree → pass signal. 1/3 agree → noise detected, block signal, retry. (A 2/3 split is not specified in the document; this lab shows it as a majority pass flagged unstable.) Pick a signal condition:
Lab 3 · The router (Impedance Matcher IM-8B)
Route each query to the smallest capable model. The document's three worked examples are the first three options; or type your own and the stand-in complexity classifier routes it.
Lab 4 · The ReAct loop (Figure 2.1), replayed
The schematics library's timing diagram for an agent that can use tools, with its own worked example. Three cycles: thought & action, execution, synthesis.
The operational manuals: highlights from Volumes 1–4
Model 1 manual (CSE-80, v2.0): the processor and its voltages
The preface sets the shift: 1980s computing was Boolean (reliability 100%); 2020s computing is stochastic (reliability variable, temperature dependent). The LLM is a non-deterministic microprocessor that needs support circuitry to function reliably.
| Die size | Chip class | Character |
|---|---|---|
| 7B – 10B | The Microcontroller | Fast, cheap, limited reasoning. Summarization, classification. The 8-bit chip. |
| 70B – 100B | The Workstation | Strong reasoning, moderate speed. Coding, complex instruction following. The 16-bit chip. |
| 400B+ | The Mainframe | Deep reasoning, creative writing, high latency, expensive. The 32-bit mainframe. |
| Voltage setting | Range | Behavior |
|---|---|---|
| Temperature 0.0 | Ground state | Greedy decoding: always the most likely next token. Essential for coding and math. |
| Temperature 0.7–1.0 | Active state | Standard conversational variance. |
| Temperature 1.5+ | Overvoltage | The model enters a manic state, often breaking grammar and logic. |
| Top-P (nucleus) | Bandwidth filter | Limits the next-token pool to the top X%. At 0.9, the bottom 10% of weird words is ignored. |
Memory doctrine: ROM = weights (immutable; teaching means re-manufacturing, i.e. fine-tuning). RAM = context window (legacy 4k–8k tokens, modern 128k–1M). Disk = vector database, paged in by the RAG fetch cycle: Query → Seek → Page In (top 3 into RAM) → Execute. The token bus is half-duplex: the model cannot listen and speak at the same time. Tool use is a handshake: Declaration → Trigger (a control code, not natural language) → Interrupt (the motherboard runs the code) → Return (the result is pasted into context). Dangerous tools get a human-in-the-loop jumper: pause, ask the UI, wait for boolean TRUE.
Model 2 manual: latency engineering and the priority interrupt controller
In Model 2 the human is the CPU and the AI is the I/O controller; the bottleneck is the keyboard and the screen. Humans perceive anything under 100ms as instant; LLMs take 2000ms+. The mismatch is engineered away: optimistic UI (confirm locally first, reconcile in the background), streaming typography (render tokens as they generate; the blinking cursor engages the eye's pursuit reflex), pre-fetching (gaze over an icon for >200ms pre-loads its model; ghost text turns 25 keystrokes into one Tab), and multimodal fusion (the “Put That There” protocol: voice says “move this to the trash,” gaze supplies the object). And because agents can generate infinite notifications, a priority interrupt controller:
| Level | Example | Delivery |
|---|---|---|
| Level 1 · Critical | “Your credit card was stolen.” | Ring the bell. |
| Level 2 · Info | “I summarized the meeting.” | Silent icon. |
| Level 3 · Noise | “I found a cool fact.” | Daily digest only. |
Uncanny valley rule: do not make the voice too human. Fake breath sounds make users uncomfortable. Pleasant, but distinctly synthetic.
Model 3 manual (WEP-25, v2.0): the neural decoder chain
In the 80s an ADC turned a 0–5V reading into an 8-bit number. Now the neural decoder turns a −70mV action potential into a semantic token. A single neuron is too noisy to trust (“you cannot trust Bit 0”), so the chain conditions the signal in four stages:
Write mode: ICMS stimulation with charge-balanced biphasic pulses — direct current would electrolyze tissue. Cognitive haptics encode texture as frequency (Hz) and pressure as amplitude (µA), so a prosthetic hand can feel a styrofoam cup without crushing it. The glial scar is the rust: the body wraps rigid probes in scar tissue until the signal fades (~6 months); the fix is “floaty” mesh electronics that move with the pulse. The veto circuit is absolute: the biological signal is master, silicon is slave, and a stress-voltage spike physically disconnects all motor output.
Model 4 manual (EAP-24, v2.0): the hierarchy of speed
Why the LLM cannot drive the motors directly: the loops run at different speeds, and the fastest loop is the one that keeps the cup from dropping.
G-Code → V-Code: open-loop “move to X:10, Y:10” is blind; closed-loop “move until [Visual_State] = [Grasped]” servos on the vision transformer at 50Hz. Sim-to-real: train in Isaac Sim / MuJoCo at 1000× speed with domain randomization (friction, gravity, lighting), so reality looks like just another variation of the sim. Compliance: Force = Stiffness × (Target_Pos − Current_Pos); low stiffness makes the robot a spring that yields instead of a rock that injures. The Asimov Circuit (E-STOP): Layer 0 hardware mushroom button cuts the 48V rail; Layer 1 firmware joint limits; Layer 2 a cognitive visual observer that slows the robot to 10% when a human is near.
Volume 5: operations, ethics & evolution
The “human” spec (CLP-25): troubleshooting, training, and society. In the 80s you used a logic probe to find a bad chip; now you use explainability tools to find a bad neuron.
| Era | Bit-width | State of the art, per the framework |
|---|---|---|
| 2018 | The 8-bit era: GPT-1, 117M params | Barely coherent. |
| 2020 | The 16-bit era: GPT-3, 175B params | Fluent but hallucinates. |
| 2024 | The 32-bit era: GPT-4 / Gemini Ultra, trillion+ | Reasoning and coding capable. |
| Future | Test-time compute | Letting the model “think” for 10 seconds (System 2) before answering, rather than just making the model bigger. |
Debug the black box
A hardware glitch (loose wire, crash) maps to inference latency spikes, found with profilers. A software bug (syntax error) maps to semantic drift: the code runs fine, the answer is wrong, found with mechanistic interpretability. Preventive maintenance: vector DB pruning, deleting or deprecation-tagging embeddings older than a year.
Cognitive literacy
From “computer literacy” (how to type) to cognitive literacy (how to delegate). AI tutors attack Bloom's 2-sigma problem: 1-on-1 instruction for every student. Cognitive prosthetics: AI writing support for dyslexia, vision-to-voice for the blind. The named risk is de-skilling: the calculator effect.
Sovereignty & the centaur
“The model ate my floppy disk”: training-data privacy, answered by machine unlearning, surgically removing a data point without breaking the brain. Employment compresses rather than disappears: centaur workflows, human + AI > human; one architect does the work of five draftsmen.
The Cognitive Systems Bible & how to boot it
The framework compiles into a single unified standard: foundations (manifesto, glossary), Volumes I–IV, Volume V lifecycle, and the component library (datasheets and schematics). Its three laws of practice:
Reliability over magic
A system that works 99% of the time is infinitely better than one that is “brilliant” 50% of the time.
Components over scripts
Modular, reusable logical blocks: fuses, buffers, matchers.
The hardware metaphor
Models are stochastic processors that require regulation, cooling (caching), and safety fuses.
The three boot protocols
| Protocol | Use |
|---|---|
| The Architect | Paste the Bible into a custom GPT or project, then demand the schematic, not a prompt: 1. Define the pinout. 2. Select the components (which fuse? which buffer?). 3. Draw the Mermaid diagram of the logic flow. 4. Write the datasheet for the system. |
| The Debugger | Diagnose failures as hardware failures. Looping forever or lying about facts: is it signal noise (temperature too high)? A grounding issue (missing RAG reference)? Bus contention (interrupt signal missing)? Prescribe the engineering fix. |
| The Educator | Explain LLMs to a surgeon, a pilot, a non-technical audience in the jargon of their field (the cockpit, the prosthetic, the circuit) mapped to the Cognitive Standard, with no computer-science jargon. |
Appendix F: standard pinouts
Provenance note: the Bible is labeled in the source “Version 1.0 (God Mode), Standard: ISO-CSE-2024.” That designation is the document's own internal standard name, not an ISO-issued standard; it is reproduced here as written.